Physical Address Extension (PAE) is a processor feature for the 32-bit IA-32 family that allows a CPU and operating system to address more physical memory than the 4 gigabyte limit imposed by standard 32-bit addressing. PAE expands the width of physical addresses used by the paging unit so the processor can reference a larger system memory pool while individual 32-bit processes retain their 32‑bit virtual address space.

How PAE works — technical characteristics

PAE changes the format and levels of page tables used by the processor. On IA-32 machines PAE provides 36-bit physical addressing (commonly described as enabling up to 64 gigabytes of RAM) by using larger page table entries and an extra level of table indirection. Page table entries become 64 bits wide, which also creates space for additional control bits such as the no-execute (NX) or execute-disable flag on CPUs that support it.

  • Physical address width: extended beyond 32 bits (commonly 36 bits on classic PAE implementations).
  • Page table format: additional level and 64-bit entries compared with legacy 32-bit paging.
  • Virtual address space per process: remains 32-bit (per-process limit unchanged).

History and vendor support

PAE was introduced in Intel s 32-bit microarchitectures beginning with the Pentium Pro and has been present on most subsequent x86 processors. Intel's implementation appeared early in the Pentium line, though some mobile variants such as certain Pentium M chips did not include it. AMD added PAE support beginning with its Athlon (K7) family and has included it in later designs. Hardware support alone is not enough: the operating system kernel must understand PAE page tables to make use of larger physical memory.

Operating system support and examples

Operating systems implemented PAE support at different times. Early server-class OS releases added PAE to enable machines to use more RAM without migrating to a full 64-bit architecture. For example, Microsoft shipped PAE-capable kernels in its enterprise releases, and many Unix-like systems such as Linux provide PAE-enabled kernels or configuration options to address more than 4 GB. Behavior, limits and licensing details vary by distribution and vendor.

Benefits, limitations and practical implications

  • Benefit: permits a single physical machine to host >4 GB of RAM while running 32-bit operating systems or mixed workloads.
  • Limitation: individual 32-bit processes still have the same virtual address ceiling (typically 4 GB or less), so PAE is primarily valuable for server and kernel memory, or for enabling many simultaneous processes to use more aggregate RAM.
  • Overheads: larger page tables consume more memory and can affect TLB behavior and performance; some device drivers or low-level code must be PAE-aware.

Notable facts and current relevance

PAE is an important transitional feature that helped extend the usable life of 32-bit x86 hardware before 64-bit processors and operating systems became ubiquitous. It also enabled the use of the NX bit on processors that encoded execute-disable in the extended page table entry. Today, with widespread 64-bit adoption, PAE is less central for new systems but remains part of the historical evolution of x86 memory management.

For further technical references see the IA-32 architecture materials such as IA-32 documentation, background on the 4 GB addressing limit (4 GB addressing), size implications like up to 64 GB (64 GB addressing), vendor histories such as Intel and practical OS support notes (operating system documentation).